Dynamic Reconfiguration for Adaptive Computing in Heterogeneous SoCs

Overview

Dynamic reconfiguration techniques including dynamic cache reconfiguration (DCR), dynamic voltagefrequency scaling (DVFS), and dynamic reconfiguration of computation and communication architectures are widely used for designing efficient systems. Although these techniques have received considerable attention from various domains in recent years, dynamic reconfiguration techniques are not employed in real-time System-on-Chip (SoC) designs. This is due to the fact that real-time systems may consist of critical tasks with soft or hard deadlines, and the additional computation required for dynamic reconfiguration may adversely affect the critical tasks. Missing deadlines may lead to performance degradation or even catastrophic failures in these systems. The goal of this proposal is to develop a comprehensive dynamic reconfiguration framework to enable adaptive computation, communication and storage in heterogeneous multicore SoCs under power, performance, energy, temperature, reliability and real-time constraints.

Members


   Faculty (PI)    Graduate Students
   Prof. Prabhat Mishra    Hadi Hajimiri
   Prof. Umit Ogras    Yuanwen Huang

Publications


Journal Articles:
J4 Weixun Wang, Prabhat Mishra and Ann Gordon-Ross, Dynamic Cache Recon.guration for Soft Real-Time Systems, Accepted to appear in ACM Transactions on Embedded Computing Systems (TECS) (TECS).
J3 Weixun Wang and Prabhat Mishra, System-Wide Leakage-Aware Energy Minimization using Dynamic Voltage Scaling and Cache Reconfiguration in Multitasking Systems, Accepted to appear in IEEE Transactions on Very Large Scale Integration Systems (TVLSI).
J2 Weixun Wang and Prabhat Mishra, Dynamic Reconfiguration of Two-Level Cache Hierarchy in Real-Time Embedded Systems, Journal of Low Power Electronics (JOLPE), Vol. 7, No. 1, February 2011.
J1 Weixun Wang, Sanjay Ranka and Prabhat Mishra, Energy-Aware Dynamic Reconfiguration Algorithms for Real-Time Multitasking Systems, Elsevier Sustainable Computing: Informatics and Systems (SUSCOM), Issue 1, pages 35-45, 2011. (Invited Paper)

Referred Conference Papers:
C7 Weixun Wang, Prabhat Mishra and Sanjay Ranka, Dynamic Cache Reconfiguration and Partitioning for Energy Optimization in Real-Time Multi-Core Systems, IEEE/ACM Design Automation Conference (DAC) (DAC), pages -, San Diego, CA, USA, June 5-10, 2011.
C6 Weixun Wang, Sanjay Ranka and Prabhat Mishra, A General Algorithm for Energy-Aware Dynamic Reconfiguration in Multitasking Systems, IEEE International Conference on VLSI Design (VLSI Design), pages -, Chennai, India, January 2-7, 2011.
C5 Weixun Wang, Xiaoke Qin and Prabhat Mishra, Temperature- and Energy-Constrained Scheduling in Multitasking Systems: A Model Checking Approach, IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pages 85-90, Austin, TX, USA, August 18-20, 2010.
C4 Weixun Wang and Prabhat Mishra, PreDVS: Preemptive Dynamic Voltage Scaling for Real-time Systems using Approximation Scheme, IEEE/ACM Design Automation Conference (DAC) (DAC), pages 705-710, Anaheim, CA, USA, June 13-18, 2010.
C3 Weixun Wang and Prabhat Mishra, Leakage-Aware Energy Minimization using Dynamic Voltage Scaling and Cache Reconfiguration in Real-Time Systems, IEEE International Conference on VLSI Design (VLSI Design), pages 357-362, Bangalore, India, January 3-7, 2010.
C2 Weixun Wang and Prabhat Mishra, Dynamic Reconfiguration of Two-Level Caches in Soft Real-Time Embedded Systems, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pages 145-150, Tampa, Florida, USA, May 13-15, 2009.
C1 Weixun Wang, Prabhat Mishra and Ann-Gordon Ross, SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems, IEEE International Conference on VLSI Design (VLSI Design), pages 547-552, New Delhi, India, January 5-9, 2009.

Research Sponsors

National Science Foundation This project is funded by the National Science Foundation (NSF). The views expressed on the site are those of the members of this project and do not necessarily represent those of the National Science Foundation.