SigSeT: Signal Selection Tool for Post Silicon Validation

This tool takes as input a logic circuit specified in the ISCAS'89 format and returns the profitable trace signals based on the algorithm outlined in Basu and Mishra. Read more and download ...




ARTEST: A Prototype Tool for TLM-to-RTL test generation

Our tool is a framework that can automatically generate both TLM testcase and RTL testcase from the input SystemC TLM specification. The tool has tree parts: i) TLM2SMV translator, ii) TLM test generator, and iii) RTL test translator from TLM tests. Read more and download ...




Bitmask-based Compression

This tool provides bitmask-based code compression and decompression. The current version uses a 2-bit fully sliding bitmask. This implementation provides an efficient bitmask-aware dictionary selection using bit-saving cost metric. Read more and download ...




Dynamic Cahce Reconfiguration in Uniprocessors

This tool enables dynamic cache configuration to improve performance and reduce energy consumption without violating the task deadlines. Read more and download ...




Dynamic Cahce Reconfiguration in Multicore Systems

This tool allows energy optimization by employing both dynamic reconfiguration of private caches and partitioning of the shared cache for multicore systems with real-time tasks. Read more and download ...